ABOUT
I’m Aruj Singh, an RTL engineer interested in digital systems, computer architecture, and the lower layers of computing.
WHAT I'M EXPLORING
Computer architecture, RTL design, VLSI, compilers, memory systems, simulation and systems engineering.
HOW I BUILD
C, C++, SystemVerilog, Python. I enjoy building tools, simulators and hardware-software projects from scratch.
ALSO
I write about systems, engineering and the mental models behind good design and share what I learn along the way.